CPEN 230L Projects
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1 min read
Overview
Over the course of Fall Semester 2023, I worked on several projects using Cedar, Quartus, and Modelsim. Notable projects include a Finite State Machine, and my final project titled “Up Down Timer”. This project took 2 weeks to create the code and test its ability to count both up and down independent of the modulo value, and manual load input.
Projects included in the repositoty:
- Simple Cedar lab circuit diagrams
- Physical circuit design
- Verilog programing on FPGA
- ModelSIM and Quartus simulation
Images
Physical Circuit
RTL Viewer
Model Sim
